The present invention relates to a semiconductor manufacturing device and a method for manufacturing semiconductor devices, and more specifically to those conducting two process steps of electrolytic copper plating and electrolytic polishing, or four process steps of electrolytic copper plating, annealing, electrolytic polishing and selective CoWP electroless plating.
Copper wiring is becoming to more highly be appreciated for use in micro-devices in which circuit delay due to parasitic resistance and parasitic capacitance of the wiring is predominant, since it can achieve lower resistivity, lower-capacitance and higher reliability as compared with those achieved by aluminum wiring. Damascene processes are widely accepted as the most general method for forming copper wiring. Of the damascene processes, dual-damascene process is most widely accepted in view of production costs. The copper wiring process has thus been expected to be reduced in cost as compared with that in the conventional aluminum wiring process through employment of the dual-damascene process.
In a typical dual-damascene process, a barrier layer is formed in grooves and connection holes, and the individual process steps of forming a copper seed layer by sputtering, filling copper into the grooves and connection holes by electrolytic plating, growing copper crystal by annealing, removing excessive copper by chemical mechanical polishing (referred to as CMP hereinafter), removing an excessive barrier layer by CMP, and forming an anti-oxidative layer by chemical vapor deposition (referred to as CVD hereinafter) on a surface of copper filled in the grooves are carried out. All of these process steps have been carried out using independent apparatuses such as an electrolytic plating apparatus, a CMP apparatus and a CVD apparatus.
However, in the forming process of the copper wiring, a plurality of process steps such as a step for forming the copper seed layer, a step for copper plating, a step for annealing and two CMP steps were carried out respectively in the corresponded apparatuses. Accordingly, there has been a problem of a long TAT (turn-around time).
In addition, polishing of the copper and the barrier layer by CMP requires separate slurries and separate pads for the copper and the barrier layer, respectively, which makes the process complicated. This raises one reason for the cost higher than that of the conventional aluminum wiring. In particular for CMP, a large cost for consumable materials such as polishing slurry and polishing pad has been a serious problem.
The present invention is to provide a semiconductor manufacturing apparatus and a method for manufacturing semiconductor devices which are aimed at solving the foregoing problems.
A first semiconductor manufacturing apparatus according to the present invention has installed therein an electrolytic plating chamber with which an electrolytic plating apparatus responsible for electrolytic plating of a substrate is constructed, an electrolytic polishing chamber with which an electrolytic polishing apparatus responsible for electrolytic polishing of a substrate is constructed, and a conveying chamber having installed therein a conveying instrument responsible for loading/unloading of the substrate to or from the electrolytic plating chamber, and to or from the electrolytic polishing chamber, and being connected respectively to the electrolytic plating chamber and the electrolytic polishing chamber.
The above-mentioned first semiconductor manufacturing apparatus has the electrolytic plating chamber with which the electrolytic plating apparatus is constructed and the electrolytic polishing chamber with which the electrolytic polishing apparatus is constructed; and the individual chambers are connected to the conveying chamber provided with the conveying instrument, so that both of electrolytic plating and electrolytic polishing are successively accomplished within a single apparatus. Moreover, these processes are successively accomplished without exposing the substrate to the air but only by conveying the substrate via the conveying chamber, so that TAT will considerably be shortened. The apparatus is also advantageous in that the costs for the consumable materials are not so expensive as in CMP, since the removal step relies upon electrolytic polishing, not upon CMP.
A second semiconductor manufacturing apparatus according to the present invention has installed therein an electrolytic plating chamber with which an electrolytic plating apparatus responsible for electrolytic plating of a substrate is constructed, an electrolytic polishing chamber with which an electrolytic polishing apparatus responsible for electrolytic polishing of a substrate is constructed, an electroless plating chamber with which an electroless plating apparatus responsible for electroless plating of the substrate is constructed, an annealing chamber with which an annealing apparatus responsible for annealing of the substrate is constructed, and a conveying chamber having installed therein a conveying instrument responsible for loading/unloading of the substrate to or from the electrolytic plating chamber, to or from the electrolytic polishing chamber, to or from the electroless plating chamber, and to or from the annealing chamber, and being connected respectively to the electrolytic plating chamber, the electrolytic polishing chamber, the electroless plating chamber and the annealing chamber.
The above-mentioned second semiconductor manufacturing apparatus has an electrolytic plating chamber with which an electrolytic plating apparatus is constructed with which the electrolytic polishing apparatus is constructed, the electrolytic polishing chamber, the electroless plating chamber and the annealing chamber; and the individual chambers are connected to the conveying chamber provided with the conveying instrument, so that all of electrolytic plating, electrolytic polishing, electroless plating and annealing are successively accomplished within a single apparatus. Moreover, these processes are successively accomplished without exposing the substrate to the air but only by conveying the substrate to or from the individual chambers via the conveying chamber, so that TAT will considerably be shortened. The apparatus is also advantageous in that the costs for the consumable materials are not so expensive as in CMP, since the removal step relies upon electrolytic polishing, not upon CMP.
A first method for manufacturing a semiconductor device according to the present invention is comprised of a step of forming an electrolytic plated film by electrolytic plating process on a substrate; and a step of successively removing at least a part of the electrolytic plated film formed on the substrate by electrolytic polishing process without exposing the substrate to an oxidative atmosphere.
The above-mentioned first method for manufacturing a semiconductor device can successively accomplish electrolytic plating and electrolytic polishing, so that TAT will considerably be shortened as compared with that in the conventional manufacturing method in which the individual processes were accomplished by wandering from apparatus to apparatus, each of which is only responsible for a single processing.
A second method for manufacturing a semiconductor device according to the present invention is comprised of a step of forming an electrolytic plated film by electrolytic plating process on a substrate; a step of successively removing at least a part of the electrolytic plated film formed on the substrate by electrolytic polishing process without exposing the substrate after the electrolytic plating to an oxidative atmosphere; a step of annealing the substrate after the electrolytic polishing without exposing the substrate to the oxidative atmosphere; and a step of forming an electroless plated film by electroless plating process on the substrate without exposing the substrate to the oxidative atmosphere.
The above-mentioned second method for manufacturing a semiconductor device can successively accomplish electrolytic plating, electrolytic polishing and electroless plating without exposing the substrate to an oxidative atmosphere, and can also accomplish annealing as being continued from the electrolytic plating, electrolytic polishing or electroless plating, so that TAT will considerably be shortened as compared with that in the conventional manufacturing method in which the individual processes were accomplished by wandering from apparatus to apparatus, each of which is only responsible for a single processing.